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microTech Global Ltd
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Gloucester, Gloucestershire
Senior DfT Engineer
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Salary: From £50,000 to £100,000 per annum Negotiable |
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Overview
JOB AD: In this position you will: Implement and validate ATPG structures, via: Partitioning for ATPG and hierarchical approaches ATPG compression and serialization Scan insertion and design rule fixing STA constraints, Primetime execution and timing exception flow Gate level simulation and debug Validate DFT structures, via: Synopsys SMS Memory BIST and repair IP BIST, typically for DDR and SERDES interfaces VHDL / Verilog design of test structures System Verilog simulation of DFT test cases Vector generation, translation and re-simulation Understand and improve test yields, address test vector instabilities, via: Validation of test structures across PVT (Vector bring-up and characterization) IP test enhancement and validation, especially high-speed digital interfaces Assist others in production test program development This job was originally posted as www.totaljobs.com/job/89906796