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Technical Futures Ltd
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Cambridge, Cambridgeshire
Senior ASIC Design Engineer
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Job Type: Full-time |
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Salary: £55,000 per annum |
Overview
Senior level ASIC Design Engineer knowledgeable in CPU and with extensive hands-on experience in ASIC implementation (RTL, Synthesis) will join a renowned Global Company, contributing to the development of class leading Audio SoCs for next generation audio platforms. As a key member of the Digital Design Team, you will get involved with the development of CPU based subsystems and providing support for DSP integration; undertaking RTL development, micro-architecture explorations through synthesis and power estimation and verification. Key Requirements include: A minimum of a 2.1 Degree in Electronics, Science or Maths. Highly knowledgeable in CPU and CPU based subsystem architecture / design. 5-10 years’ experience in ASIC implementation (RTL, Synthesis). Fluency in hardware description languages (Verilog / SV). A good understanding of verification techniques. Familiarity with physical synthesis flow. Good to see experience of DSP hardware / software. FPGA platforms, Scripting languages. A generous salary package will be offered including Share Options, Private Healthcare and relocation assistance.