FPGA Engineers

FPGA Engineers Description About Us What we do matters\. In short, we work to make the world safer\. No matter where your talents lie, working as part of TRL Technology means you are directly contributing to a more secure society, helping to protect national security and combat evolving and emerging threats around the world\. We are a small to medium enterprise, part of a rich tapestry of other companies which make up L3Harris Technologies\. We have circa 300 employees and counting but successfully compete against much larger businesses delivering electronic systems in the fields of electronic warfare and cyber security\. To find out more about what we do in the Electronic Warfare and Cyber Security space, please see our website: www\.trltech\.co\.uk To get a gist of what we stand for, other vacancies and our comprehensive perks including 25 days holiday, 5% pension, annual bonus, 12pm finish on Fridays and access to a benefits portal amongst many others, please take a look at our careers website www\.trlcareers\.co\.uk The Role We are looking for FPGA Engineers with a range of experience to join various teams within our Engineering department\. You will be an integral part of a team involved in the design, development and verification of complete systems, ranging from simple CPLD developments to complex DSP designs built on the latest state of the art FPGA devices\. Where You Fit In Engineering Manager Senior Principal Engineer / Senior Specialist Principal Engineer / Specialist Senior Engineer Advanced Engineer Engineer The Person We Seek Driven, adaptable, innovative, self\-starter capable of quickly assimilating information from a range of sources\. Someone who knows what they know and what they don't with the ability to draw upon and collaborate with others from a range of functions\. Someone who is keen to make a difference by suggesting improvements, implementing changes and progressing our business\. The Tech You'll Use We work with devices from Xilinx, Altera and Microsemi - encompassing both traditional FPGA and the latest generation of System\-on\-a\-Chip devices\. VHDL is the preferred description language with Mentor Graphics QuestaSim used for simulation and verification\. We leverage tools such as Jira, Git, Bamboo, Jenkins, Confluence, DOORS and Enterprise Architect\. Opportunities Available To You + The opportunity to work on cutting edge FPGA designs, pushing the boundaries of what is achievable in modern devices\. + The opportunity to work in an agile, cross\-functional team delivering products and solutions that make the world safer\. + In\-house and external training to equip you with the skills you need to get the job done\. + Development of your people management, mentoring and development skills\. + Cross domain working to develop your skills across different areas of the business\. Your Experience + You will have been involved with all phases of the FPGA development lifecycle, from initial architecture design, requirements specification, and design documentation through to code development, formal verification and final integration + You will be able to communicate effectively with other team members, \(including hardware, software, PCB and mechanical designers\) to agree interface specifications and progress integration solutions + Flexibility is essential as specifications may not be fully defined at the start of development, and liaison with system architects and project leadership for continued feedback and development of requirements is likely throughout a design activity Your Skills Required + VHDL skills, particularly targeting Xilinx and Altera FPGA and System on a Chip devices + VHDL\-based design, implementation and verification experience using self\-checking functional verification + Experience of FPGA simulation and verification using Mentor Graphics QuestaSim + Experience with Xilinx Vivado/PlanAhead and Intel/Altera Quartus Prime tools + Digital design including interfacing to hardware, peripherals and processors + Experience with modern, team\-based version control systems Desirable + Experience of achieving robust timing closure in complex FPGA devices + Experience with AXI interface standards + Ability to work with/develop timing constraints + Ability to develop and maintain scripted build flows \(TCL/ Python/Makefile\) More Information All of our roles require successful candidates to undergo and maintain a Baseline Personnel Security Standard and/or United Kingdom Security Vetting \(UKSV\) to obtain a Security Check \(SC\) without restrictions\. Please note that in the event that the required clearance cannot be obtained you may not be eligible for the role and/or any offer of employment may be withdrawn on grounds of national security\. Qualifications Primary Location GB\-ENG\-Tewkesbury US Security Clearance Required: None Schedule: Full\-time Shift: Day \- 1st Travel: No Req ID: 107454